ENCM 369: Computer Organization
Winter 2020 Section 01 Lecture Page

up to ENCM 369 Winter 2020 home page

Last modified: Wed Apr 1 14:01:07 MDT 2020

About this page

Here you will find links to PDFs of lecture slides, PDFs of lecture notes, and related material, for lecture section 01 (Steve Norman's 11:00am section).

(For material from lecture section 02—Norm Bartley's 10:00am section—see Norm's ENCM 369 L02 Home Page.)

Slides, in PDF format

To view Slide Sets 8 and higher, please go to "Video Lectures" on the D2L site for sections L01 and L02 of ENCM 369.

Lecture-by-lecture information

Below is lecture information in reverse chronological order, for in-person lectures only. For video lectures starting Tuesday March 17, please see the D2L site for ENCM 369.

Day Date Lecture topics, references to slide sets and textbook Doc
Cam
pages
Mon Mar 16 All classes at Ucalgary were cancelled this day in response to the COVID-19 crisis. n/a
Fri Mar 13 All classes at Ucalgary were cancelled this day in response to the COVID-19 crisis. n/a
Wed Mar 11 Detailed study of flow of instructions through the pipelined datapath of textbook Figure 7.47. Control for that datapath.
Slides: 45-60 from Slide Set 7.
Textbook reference: Section 7.5
link
Mon Mar 9 Stalling and forwarding to solve data hazards. Overview of solutions to control hazards. Introduction to hardware organization for 5-stage MIPS pipelines.
Slides: 30-47 from Slide Set 7.
Textbook reference: Section 7.5
See also: Control Hazard Solutions
link
Fri Mar 6 Introduction to pipelined synchronous logic circuits. The 5 stages of textbook section 7.5 pipeline designs. Introduction to pipeline hazards.
Slides: 1-30 from Slide Set 7.
Textbook reference: Sections 3.6, 7.5
See also: Pipeline Basics
link
Wed Mar 4 Details of control for the single-cycle MIPS subset machine. Timing constraints for the single-cycle MIPS subset machine. Extending the single-cycle MIPS subset machine to support J and ADDI.
Slides: 80-98 from Slide Set 6.
Textbook reference: Section 7.3
See also: The Single Cycle Handout
link
Mon Mar 2 Single-cycle datapaths for LW, SW, R-type instructions and BEQ. Introduction to control for the single-cycle MIPS subset machine.
Slides: 60-80 from Slide Set 6.
Textbook reference: Section 7.3
See also: The Single Cycle Handout
link
Fri Feb 28 Performance analysis: run time = IC X CPI X clock period. Introduction to the single-cycle computer of textbook Section 7.3. Definitions of datapath and control. Additional components for datapaths: 32-bit adder, 32-bit ALU, 16-to-32-bit sign extend unit.
Slides: 28-59 from Slide Set 6.
Textbook reference: Sections 7.1-7.3
link
Wed Feb 26 Instructions chosen by compilers for signed and unsigned addition. Introduction to processor designs of Chapter 7 in the course textbook. Instruction Memory, the Register File, and Data Memory.
Slides: 63-71 from Slide Set 5; 1-27 from Slide Set 6.
Textbook reference: Section 7.1
link
Mon Feb 24 How to detect signed overflow in binary addition. add, addu, addi and addiu instructions. Unsigned overflow in binary addition. Signed and unsigned integer subtraction, overflow in subtraction, and the sub and subu instructions.
Slides: 39-62 from Slide Set 5.
Textbook reference: Sections 5.2.1, 5.2.2
See also: Addition, Subtraction, and Overflow
link
Mon-Fri Feb 17-21 Winter Term Break Week. No lectures. n/a
Fri Feb 14 Sign extension of two's-complement integers. Review of rules and circuits for binary addition. Signed overflow in binary addition.
Slides: 24-38 from Slide Set 5.
Textbook reference: Sections 1.4.6, 5.2.1
link
Wed Feb 12 More about static and dynamic linking of executables. Review of unsigned integer representation and signed two's complement integer representation.
Slides: 54-63 from Slide Set 4; 1-23 from Slide Set 5.
Textbook reference: Sections 6.6, 1.4
link
Mon Feb 10 Getting pieces of addresses into machine using symbol tables and relocation information. An example of an error that is common when trying to build an executable with gcc (or a similar command). Static and dynamic linking of executables.
Slides: 37-54 from Slide Set 4.
Textbook reference: Section 6.6
link
Fri Feb 7 Machine language encoding of jr instructions. Overview of the toolchain used to build excutable files from C source code: preprocessor, compiler, assembler, linker. Organization of object files and executable files.
Slides: 12-38 from Slide Set 4.
Textbook reference: Section 6.6
link
Wed Feb 5 MIPS logical instructions. Machine language encodings of beq, bne, j and jal instructions.
Slides: 34-43 from Slide Set 3; 1-11 from Slide Set 4.
Textbook reference: Sections 6.4.1, 6.5
link
Mon Feb 3 Example uses of MIPS sb instructions. Why do lb and lbu both exist? C string copy translated to AL. A complex stack frame example. Introduction to logical instructions.
Slides: 24-35 from Slide Set 3.
Textbook reference: Sections 6.4.5, 6.4.1
link
Fri Jan 31 Discussion of example procedure with local variables allocated on the stack. ASCII and Unicode. Organization of bytes within memory words. MIPS lb, lbu, and sb instructions.
Slides: 44-47 from Slide Set 2; 1-23 from Slide Set 3.
Textbook reference: Sections 6.4.6, 6.4.5
See also: page 4 of The Stack Handout
link
Wed Jan 29 Remarks about using the stack to solve the s-register conflict problem. Solutions to the a-register conflict problem. Allocation of local variables on the stack.
Slides: 30-45 from Slide Set 2.
Textbook reference: Section 6.4.6
See also: pages 2-4 of The Stack Handout
link
Mon Jan 27 The $ra register conflict problem. Maps for MARS memory organization. Allocation and deallocation of stack memory. Solutions to the $ra register and s-register conflict problems using the stack.
Slides: 22-32 from Slide Set 2.
Textbook reference: Section 6.4.6
See also: page 1 of The Stack Handout

(Note about the doc cam pages: I made a correction near the top of page 3 after the lecture ended—to multiply by 16 with sll, the shift count should be 4, not 16.)
link
Fri Jan 24 Use of a left-shift instruction to multiply by a power of two. MIPS AL pseudoinstructions. Procedure call and return. Important terms: caller, callee, leaf, nonleaf. Register conventions for passing arguments and return values. Introduction to register conflict problems.
Slides: 77-83 from Slide Set 1; 1-22 from Slide Set 2.
Textbook reference: Sections 6.7.1, 6.4.6
link
Wed Jan 22 MIPS GPRs $s0-$s7 and $t0-$t9. MIPS AL syntax for lw and sw instructions. Array elements, registers, and memory. Branch and jump instructions. Comparison using the slt instruction.
Slides: 63-76 from Slide Set 1.
Textbook reference: Sections 6.2-6.3
link
Mon Jan 20 Interaction between a MIPS processor and memory. General format of MIPS assembly language instructions, and examples. The $zero register. Registers $s0-$s7 and $t0-$t9.
Slides: 37-38 and 51-63 from Slide Set 1.
Textbook reference: Sections 6.2-6.3
link
Fri Jan 17 Alignment rules for MIPS memory access. The PC (program counter) and its role in insruction fetch. Some example MIPS instructions. Some comments about programming in assembly language.

I was out of town, so the lecture was given by Norm Bartley. Here are Norm's notes in PDF form.

Norm's lecture covered pretty much the same material as slides 37-50 and 57-59 in my Slide Set 1. If you would like to read notes that match those slides, please see this PDF file.

Textbook reference: Sections 6.2-6.3
n/a
Wed Jan 15 Simple models for computer memory; simplest useful model of how a computer works. Introduction to the MIPS32 instruction set. Overview of a model for MIPS32 memory.
Slides: 19-38 from Slide Set 1.
Textbook reference: Sections 6.1-6.3
link
Mon Jan 13 Course organization and policies; organization of a simple computer. A change to the model for C program execution presented in ENCM 335 and ENSF 337: Not all variables and function parameters are in main memory—some are in registers within the processor.
Slides: all of Winter 2020 Course Introduction, 1-19 from Slide Set 1.
Textbook reference: Sections 6.1 and 6.2 (for general background).
link